The present invention pertains to semiconductor digital circuits known as current controlled gates.
The capability of a logic circuit to drive heavy loads, e.g., high fan-out and/or output capacitance, is highly desirable. A push-pull driver has been frequently used in the art to efficiently provide this capability.
One such circuit, a current controlled gate (CCG) circuit, comprises an emitter follower and an AC coupled pull-down output used in a push-pull configuration. Such a CCG circuit is disclosed in an article entitled "Active Pull-Down Circuit For Current-Controlled Gate" by A. H. Dansky and J. P. Norsworthy, IBM Technical Disclosure Bulletin, Vol. 24 No. 11A April 1982, pp. 5613-5618 and in U.S. patent application Ser. No. 478,613, filed Mar. 25, 1983.
A highly desirable feature for a logic circuit to possess is the "dot", also known as the "dot or", logic function. The "dot" is the merging of two levels of logic into one level of logic by simply connecting the outputs of two or more circuits together to provide the logical "or" of the outputs. The logic power of CCG circuits would be increased if such circuits could be dotted. Without the dot, one would require an additional level of logic to merge logic states. In addition, the "dot" is needed to build a latch from CCG circuits.
Unfortunately, push-pull circuits such as the CCG, operate poorly when the outputs of two or more circuits are dotted. In particular, when CCG outputs are dotted, transitions between certain input states cause an active pull-up to work against an active pull-down. When this occurs, high levels of current flow in the CCG circuits and unaffordably high amounts of power are dissipated. Furthermore, in the case of the CCG circuit, spikes on the output occur during transitions between certain input states when the output should not change.